Software Defiend Phase Locked Loop

نویسندگان

  • B N Biswas
  • A Bhattacharya
  • S Chatterjee
چکیده

In this paper a new variety of the digitized version of an analog phase locked loop has been proposed in order to overcome the conditionally stable nature of a software controlled phase locked loop. Also the conventional need of a low pass filter to filter out the high frequency components at the output of a phase detector is avoided through the use of In-phase and Quadrature signals. MATLAB simulation results have been presented in support of the conclusions of the analyses.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Dual Phase Detector Based Delay Locked Loop for High Speed Applications

In this paper a new architecture for delay locked loops will be presented.  One of problems in phase-frequency detectors (PFD) is static phase offset or reset path delay. The proposed structure decreases the jitter resulted from PFD by switching two PFDs. In this new architecture, a conventional PFD is used before locking of DLL to decrease the amount of phase difference between input and outpu...

متن کامل

High Speed Delay-Locked Loop for Multiple Clock Phase Generation

In this paper, a high speed delay-locked loop (DLL) architecture ispresented which can be employed in high frequency applications. In order to design the new architecture, a new mixed structure is presented for phase detector (PD) and charge pump (CP) which canbe triggered by double edges of the input signals. In addition, the blind zone is removed due to the elimination of reset signal. Theref...

متن کامل

Software Phase Locked Loop Design Using C2000TM Microcontrollers for Single Phase Grid Connected Inverter

Grid connected applications require an accurate estimate of the grid angle to feed power synchronously to the grid. This is achieved using a software phase locked loop (PLL). This application report discusses different challenges in the design of software phase locked loops and presents a methodology to design phase locked loops using C2000 controllers for single phase grid connection applicati...

متن کامل

A-New-Closed-form-Mathematical-Approach-to-Achieve Minimum Phase Noise in Frequency Synthesizers

The aim of this paper is to minimize output phase noise for the pure signal synthesis in the frequency synthesizers. For this purpose, first, an exact mathematical model of phase locked loop (PLL) based frequency synthesizer is described and analyzed. Then, an exact closed-form formula in terms of synthesizer bandwidth and total output phase noise is extracted. Based on this formula, the phase ...

متن کامل

Closed-Form Analytical Equations to Transient Analysis of Bang-Bang Phase-Locked Loops

Due to the nonlinear nature of the Bang-Bang phase-locked loops (BBPLLs), its transient analysis is very difficult. In this paper, new equations are proposed for expression of transient behavior of the second order BBPLLs to phase step input. This approach gives new insights into the transient behavior of BBPLLs. Approximating transient response to reasonable specific waveform the loop tran...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2005